74LVC74AD,112
| Parameters | |
|---|---|
| Factory Lead Time | 4 Weeks |
| Mounting Type | Surface Mount |
| Package / Case | 14-SOIC (0.154, 3.90mm Width) |
| Surface Mount | YES |
| Operating Temperature | -40°C~125°C TA |
| Packaging | Tube |
| Series | 74LVC |
| JESD-609 Code | e4 |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 14 |
| Type | D-Type |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Technology | CMOS |
| Voltage - Supply | 1.2V~3.6V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | NOT SPECIFIED |
| Supply Voltage | 1.8V |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Base Part Number | 74LVC74 |
| Function | Set(Preset) and Reset |
| Output Type | Differential |
| Number of Elements | 2 |
| Supply Voltage-Max (Vsup) | 3.6V |
| Clock Frequency | 250MHz |
| Family | LVC/LCX/Z |
| Current - Quiescent (Iq) | 10μA |
| Current - Output High, Low | 24mA 24mA |
| Output Polarity | COMPLEMENTARY |
| Number of Bits per Element | 1 |
| Max Propagation Delay @ V, Max CL | 5.2ns @ 3.3V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 4pF |
| Length | 8.65mm |
| Width | 3.9mm |
| RoHS Status | ROHS3 Compliant |
74LVC74AD,112 Overview
In the form of 14-SOIC (0.154, 3.90mm Width), it has been packaged. D flip flop is included in the Tubepackage. There is a Differentialoutput configured with it. Positive Edgeis the trigger it is configured with. Surface Mountis positioned in the way of this electronic part. A 1.2V~3.6Vsupply voltage is required for it to operate. In the operating environment, the temperature is -40°C~125°C TA. This logic flip flop is classified as type D-Type. This type of FPGA is a part of the 74LVC series. Its output frequency should not exceed 250MHz. A total of 2elements are contained within it. There is 10μA quiescent consumption. There are 14 terminations,If you search by 74LVC74, you will find similar parts. Power is provided by a 1.8V supply. This JK flip flop has a 4pFfarad input capacitance. Devices in the LVC/LCX/Zfamily are electronic devices. As soon as Vsup reaches 3.6V, the maximum supply voltage is reached.
74LVC74AD,112 Features
Tube package
74LVC series
74LVC74AD,112 Applications
There are a lot of Nexperia USA Inc. 74LVC74AD,112 Flip Flops applications.
- Digital electronics systems
- Matched Rise and Fall
- ESCC
- Consumer
- Shift registers
- 2 – Bit synchronous counter
- ESD performance
- Divide a clock signal by 2 or 4
- Modulo – n – counter
- Set-reset capability