74LVC374AMTR
| Parameters | |
|---|---|
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 20-SOIC (0.295, 7.50mm Width) |
| Number of Pins | 20 |
| Operating Temperature | -55°C~125°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74LVC |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 20 |
| Type | D-Type |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Subcategory | FF/Latches |
| Packing Method | TAPE AND REEL |
| Technology | CMOS |
| Voltage - Supply | 1.65V~3.6V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Supply Voltage | 2.7V |
| Base Part Number | 74LVC374 |
| Function | Standard |
| Output Type | Tri-State, Non-Inverted |
| Number of Elements | 1 |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 3.6V |
| Power Supplies | 3.3V |
| Number of Ports | 2 |
| Number of Bits | 8 |
| Propagation Delay | 9.4 ns |
| Turn On Delay Time | 1 ns |
| Family | LVC/LCX/Z |
| Logic Function | D-Type, Flip-Flop |
| Current - Quiescent (Iq) | 10μA |
| Output Characteristics | 3-STATE |
| Current - Output High, Low | 24mA 24mA |
| Max I(ol) | 0.024 A |
| Max Propagation Delay @ V, Max CL | 8.2ns @ 3.3V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 4pF |
| Number of Input Lines | 8 |
| Clock Edge Trigger Type | Positive Edge |
| Height Seated (Max) | 2.65mm |
| Width | 7.5mm |
| Radiation Hardening | No |
| RoHS Status | ROHS3 Compliant |
74LVC374AMTR Overview
In the form of 20-SOIC (0.295, 7.50mm Width), it has been packaged. There is an embedded version in the package Tape & Reel (TR). T flip flop uses Tri-State, Non-Invertedas its output configuration. The trigger configured with it uses Positive Edge. It is mounted in the way of Surface Mount. A 1.65V~3.6Vsupply voltage is required for it to operate. -55°C~125°C TAis the operating temperature. A flip flop of this type is classified as a D-Type. The FPGA belongs to the 74LVC series. In total, there are 1 elements. As a result, it consumes 10μA of quiescent current without being affected by external factors. Terminations are 20. The 74LVC374 family contains it. A voltage of 2.7V is used as the power supply for this D latch. JK flip flop input capacitance is 4pF farads. This D flip flop belongs to the family of LVC/LCX/Z. There is an electronic part mounted in the way of Surface Mount. A total of 20pins are provided on this board. There is a clock edge trigger type of Positive Edgeon this device. The RS flip flops belongs to FF/Latches base part number. 8bits are used in its design. The maximal supply voltage (Vsup) reaches 3.6V. In light of its reliable performance, this T flip flop is well suited for TAPE AND REEL. In order for the device to operate, it requires 3.3V power supplies. The D flip flop has no ports embedded. This input has 8lines.
74LVC374AMTR Features
Tape & Reel (TR) package
74LVC series
20 pins
8 Bits
3.3V power supplies
74LVC374AMTR Applications
There are a lot of STMicroelectronics 74LVC374AMTR Flip Flops applications.
- Latch-up performance
- Modulo – n – counter
- Pattern generators
- Clock pulse
- CMOS Process
- Buffer registers
- ESCC
- QML qualified product
- Digital electronics systems
- Guaranteed simultaneous switching noise level