| Parameters |
| Mounting Type |
Through Hole |
| Package / Case |
20-DIP (0.300, 7.62mm) |
| Surface Mount |
NO |
| Operating Temperature |
-40°C~125°C TA |
| Packaging |
Tube |
| Published |
1999 |
| Series |
74HCT |
| JESD-609 Code |
e4 |
| Part Status |
Obsolete |
| Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
| Number of Terminations |
20 |
| Type |
D-Type |
| Terminal Finish |
Nickel/Palladium/Gold (Ni/Pd/Au) |
| Subcategory |
FF/Latches |
| Technology |
CMOS |
| Voltage - Supply |
4.5V~5.5V |
| Terminal Position |
DUAL |
| Peak Reflow Temperature (Cel) |
260 |
| Supply Voltage |
5V |
| Terminal Pitch |
2.54mm |
| Reach Compliance Code |
unknown |
| Time@Peak Reflow Temperature-Max (s) |
30 |
| Base Part Number |
74HCT7273 |
| JESD-30 Code |
R-PDIP-T20 |
| Function |
Master Reset |
| Qualification Status |
Not Qualified |
| Output Type |
Non-Inverted |
| Number of Elements |
1 |
| Supply Voltage-Max (Vsup) |
5.5V |
| Power Supplies |
5V |
| Supply Voltage-Min (Vsup) |
4.5V |
| Load Capacitance |
50pF |
| Clock Frequency |
56MHz |
| Family |
HCT |
| Current - Quiescent (Iq) |
8μA |
| Output Characteristics |
OPEN-DRAIN |
| Current - Output High, Low |
- 4mA |
| Output Polarity |
TRUE |
| Max I(ol) |
0.004 A |
| Number of Bits per Element |
8 |
| Max Propagation Delay @ V, Max CL |
30ns @ 4.5V, 50pF |
| Trigger Type |
Positive Edge |
| Input Capacitance |
3.5pF |
| fmax-Min |
20 MHz |
| Max Frequency@Nom-Sup |
20000000Hz |
| Height Seated (Max) |
4.2mm |
| Length |
26.73mm |
| Width |
7.62mm |
| RoHS Status |
ROHS3 Compliant |
74HCT7273N,112 Overview
The item is packaged in 20-DIP (0.300, 7.62mm)cases. It is contained within the Tubepackage. In the configuration, Non-Invertedis used as the output. There is a trigger configured with Positive Edge. Through Holeis positioned in the way of this electronic part. A voltage of 4.5V~5.5Vis required for its operation. Temperature is set to -40°C~125°C TA. D-Typedescribes this flip flop. The 74HCTseries comprises this type of FPGA. Its output frequency should not exceed 56MHz Hz. In total, it contains 1 elements. There is a consumption of 8μAof quiescent energy. There have been 20 terminations. It is a member of the 74HCT7273 family. It is powered by a voltage of 5V . JK flip flop input capacitance is 3.5pF farads. In this case, the D flip flop belongs to the HCTfamily. There is a base part number FF/Latchesfor the RS flip flops. The maximal supply voltage (Vsup) reaches 5.5V. Normal operation requires a supply voltage (Vsup) above 4.5V. There are 5V power supplies attached to it.
74HCT7273N,112 Features
Tube package
74HCT series
5V power supplies
74HCT7273N,112 Applications
There are a lot of NXP USA Inc. 74HCT7273N,112 Flip Flops applications.
- Frequency Dividers
- ATE
- ESD performance
- Control circuits
- Reduced system switching noise
- Registers
- Guaranteed simultaneous switching noise level
- Frequency division
- QML qualified product
- 2 – Bit synchronous counter