| Parameters |
| Mounting Type |
Through Hole |
| Package / Case |
20-DIP (0.300, 7.62mm) |
| Surface Mount |
NO |
| Operating Temperature |
-40°C~125°C TA |
| Packaging |
Tube |
| Published |
2001 |
| Series |
74HCT |
| JESD-609 Code |
e4 |
| Part Status |
Obsolete |
| Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
| Number of Terminations |
20 |
| Type |
D-Type |
| Terminal Finish |
Nickel/Palladium/Gold (Ni/Pd/Au) |
| Subcategory |
FF/Latches |
| Technology |
CMOS |
| Voltage - Supply |
4.5V~5.5V |
| Terminal Position |
DUAL |
| Peak Reflow Temperature (Cel) |
260 |
| Supply Voltage |
5V |
| Terminal Pitch |
2.54mm |
| Time@Peak Reflow Temperature-Max (s) |
30 |
| Base Part Number |
74HCT534 |
| JESD-30 Code |
R-PDIP-T20 |
| Function |
Standard |
| Qualification Status |
Not Qualified |
| Output Type |
Tri-State, Inverted |
| Number of Elements |
1 |
| Supply Voltage-Max (Vsup) |
5.5V |
| Power Supplies |
5V |
| Supply Voltage-Min (Vsup) |
4.5V |
| Load Capacitance |
50pF |
| Number of Ports |
2 |
| Clock Frequency |
40MHz |
| Family |
HCT |
| Current - Quiescent (Iq) |
8μA |
| Output Characteristics |
3-STATE |
| Current - Output High, Low |
6mA 6mA |
| Max I(ol) |
0.006 A |
| Number of Bits per Element |
8 |
| Max Propagation Delay @ V, Max CL |
30ns @ 4.5V, 50pF |
| Trigger Type |
Positive Edge |
| Input Capacitance |
3.5pF |
| Propagation Delay (tpd) |
45 ns |
| Height Seated (Max) |
4.2mm |
| Length |
26.73mm |
| Width |
7.62mm |
| RoHS Status |
ROHS3 Compliant |
74HCT534N,652 Overview
The package is in the form of 20-DIP (0.300, 7.62mm). D flip flop is embedded in the Tube package. The output it is configured with uses Tri-State, Inverted. JK flip flop uses Positive Edgeas the trigger. There is an electronic component mounted in the way of Through Hole. Powered by a 4.5V~5.5Vvolt supply, it operates as follows. A temperature of -40°C~125°C TAis used in the operation. This electronic flip flop is of type D-Type. JK flip flop belongs to the 74HCTseries of FPGAs. In order for it to function properly, its output frequency should not exceed 40MHz. In total, there are 1 elements. As a result, it consumes 8μA quiescent current and is not affected by external forces. In 20terminations, a transmission line is terminated with a JK flip flop that matches its characteristic impedance. This D latch belongs to the family of 74HCT534. Power is provided by a 5V supply. Input capacitance of this device is 3.5pF farads. This D flip flop belongs to the family of HCT. This part is included in FF/Latches. As soon as Vsup reaches 5.5V, the maximum supply voltage is reached. Normal operation requires a supply voltage (Vsup) above 4.5V. The D latch operates on 5V volts. The D flip flop is embedded with 2ports.
74HCT534N,652 Features
Tube package
74HCT series
5V power supplies
74HCT534N,652 Applications
There are a lot of NXP USA Inc. 74HCT534N,652 Flip Flops applications.
- Load Control
- ESCC
- Asynchronous counter
- Counters
- Count Modes
- Matched Rise and Fall
- Frequency division
- Differential Individual
- Clock pulse
- Instrumentation